A prescaler is a circuit which generates an output signal related to an input signal by a fractional scale factor. A typical example of a prescaler is a decade frequency divider which has an output frequency which is one tenth of the input frequency. Commonly known implementations of prescalers utilize static decode logic gates having inputs connected to binary control signals. The binary control signals are used to select a predetermined prescale rate, and the static decode logic is usually a one of 2.sup.n decoder where n is the number of control signal bits. Outputs of the static decode logic gates are coupled to another decoder for selecting and providing the correctly scaled output signal. Other implementations utilize a counter circuit consisting of serial flip flop circuits which are used to obtain a fractional output signal from a clock signal. Each of the flip flop circuits has a static decode logic circuit coupled to each flip flop for decoding binary control signals which control the switching of a clock signal. Known prescaler circuits utilize considerable decode circuitry associated with a counter and are therefore disadvantageous where circuit size is an important design factor. Prescalers which utilize both even and odd fractional scale factors also require complex state decoding logic to provide the odd fractional scale factors. Further, additional flip flop circuitry is generally required if the prescaler output signal is made synchronous with the input signal.